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cmos 4-bit single chip microcomputer description the cxp402 is a cmos 4-bit single chip micro- computer which consists of 4-bit cpu, rom, ram, 8-bit timer, 8-bit timer/counter, 18-bit time-base timer, lcd controller/driver, digital signal processor circuit for cd player, 1-bit dac and the like. features instruction cycle 1.89s for 16.93mhz oscillation rom capacity 6144 8 bits ram capacity 400 4 bits (including stack and display area) lcd controller/driver (enables to direct drive) 8-bit timer, 8-bit timer/event counter and 18-bit time-base timer are incorporated; they are independently controllable. arithmetic and logical operations between the entire ram area, i/o area and the accumulator by means of the memory mapped i/o. entire rom area can be referred by the table look- up instruction. digital signal processor (dsp) block playback mode supporting cav (constant angular velocity) frame jitter free allows relative rotational velocity readout supports spindle external control wide capture range playback mode spindle rotational velocity following method 16k ram efm data demodulation enhanced efm frame sync signal protection sec strategy-based error correction subcode demodulation and sub q data error detection digital spindle servo 16-bit traverse counter asymmetry correction circuit servo auto sequencer digital audio interface output digital peak meter digital filter, dac and analog low-pass filter blocks dbb (digital bass boost) function digital de-emphasis digital attenuation zero detection function 8fs oversampling digital filter s/n: 100db or more (master clock: 384fs, typ.) logical value: 109db thd + n: 0.007% or less (master clock: 384fs, typ.) rejection band attenuation: ?0db or more 112-pin plastic lqfp piggyback package (cxp401z) available structure silicon gate cmos ic ?1 e98924-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. cxp402 112 pin lqfp (plastic)
? 2 cxp402 5 8 5 9 6 0 6 3 6 4 6 1 6 2 7 0 6 5 x r s t r m c p c 3 p c 2 p c 1 p c 0 p b 3 p b 2 p b 1 p b 0 2 9 s e i n c n i n d a t o x l t o c l k o m o n m d s m d p l o c k v p c o 2 v p c o 1 v c k i v 1 6 m v c t l p c o f i l i f i l o a v s s c l t v a v d d r f b i a s a s y i a s y o c 4 m s b s o e x c k 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 3 4 5 1 4 9 5 4 5 5 v l c 1 v l c 2 v l c 3 c o m 0 c o m 1 c o m 2 c o m 3 s e g 0 s e g 1 s e g 2 s e g 3 8 8 8 7 8 6 8 5 8 9 9 0 9 5 9 4 9 1 9 2 9 3 l r c k p c m d p c m d i b c k b c k i a v s s a v d d a o u t 2 a i n 2 l o u t 2 a v s s x v s s x t a o x t a i x v d d a v s s l o u t 1 a i n 1 a o u t 1 a v d d a v s s l r c k i 3 7 3 6 3 5 3 4 3 2 3 3 1 0 0 9 9 9 8 9 7 9 6 1 0 1 1 0 2 1 0 3 1 0 4 1 0 5 1 0 6 1 0 7 1 0 8 1 0 9 1 1 0 1 1 1 6 9 6 8 6 7 6 6 p a 3 p a 2 p a 1 p a 0 7 3 7 4 8 1 8 2 8 3 8 4 7 5 7 6 7 7 7 8 7 9 8 0 s e g 1 5 s e g 1 4 s e g 1 3 s e g 1 2 s e g 1 1 s e g 1 0 s e g 9 s e g 8 s e g 7 s e g 6 s e g 5 s e g 4 2 7 2 8 t e s t 1 t e s t 0 g t o p x p c k r f c k c 2 p o x r o f m n t 3 m n t 1 m n t 0 d o u t w f c k 3 9 3 8 4 1 4 2 4 5 4 6 4 7 4 8 5 0 5 2 6 7 5 7 7 1 7 2 v s s v d d v d d v s s 4 3 4 4 5 6 c t e s t d t e s t v s s v d d x r s t o f o k g f s e m p h s c o r 3 0 3 1 5 1 5 3 4 0 l c d c o n t r o l l e r / d r i v e r s p c 5 0 0 c p u c o r e r o m 6 k b y t e r a m 4 0 0 4 b i t t / c r m c p o r t r s t s c o r e m p h i s e r v o a u t o s e q u e n c e r d i g i t a l c l v d i g i t a l p l l a s y m m e t r y c o l l e c t o r d / a i / f e f m d e m o d u l a t o r e p r o m c o l l e c t o r 1 - b i t d a c d i g i t a l f i l t e r t e s t c i r c u i t a n a l o g o u t 1 6 k r a m a c d t r m u t l m u t d a t a x l a t c l o k x r s t s y s m p w m i x t s l a s y e s e n s f o k g f s s q c k s q s o i n t p y 0 p y 2 p x 0 p x 3 p f 0 p f 1 p f 2 p f 3 p e 0 p e 1 p e 2 p e 3 p d 0 p d 1 p d 2 p y 1 s i o i / f o s c p o r t i / f c p u i / f p y 3 block diagram
? 3 cxp402 pin configuration (top view) 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 1 5 7 5 8 5 9 6 0 6 3 6 4 6 1 6 2 7 0 6 9 6 8 6 7 6 5 6 6 7 1 7 2 7 3 7 4 8 1 8 2 8 3 8 4 7 5 7 6 7 7 7 8 7 9 8 0 s e i n c n i n d a t o x l t o c l k o v s s v d d m o n m d p m d s l o c k v p c o 2 v p c o 1 v c k i v 1 6 m v c t l p c o f i l i f i l o a v s s c l t v a v d d r f b i a s a s y i a s y o t e s t 1 t e s t 0 x r s t x r s t o f o k l r c k p c m d p c m d i b c k b c k i g t o p x p c k g f s r f c k c 2 p o v s s v d d x r o f m n t 3 m n t 1 m n t 0 c 4 m d o u t e m p h w f c k s c o r s b s o e x c k d t e s t n c a v s s a v d d a o u t 2 a i n 2 l o u t 2 a v s s x v s s x t a o x t a i x v d d a v s s l o u t 1 a i n 1 a o u t 1 a v d d a v s s v l c 1 v l c 2 v l c 3 c o m 0 c o m 1 c o m 2 c o m 3 s e g 0 s e g 1 s e g 2 s e g 3 s e g 1 5 v d d v s s r m c p c 3 p c 2 p c 1 p c 0 c t e s t p b 3 p b 2 p b 1 p b 0 p a 3 p a 2 p a 1 p a 0 s e g 1 4 s e g 1 3 s e g 1 2 s e g 1 1 s e g 1 0 s e g 9 s e g 8 s e g 7 s e g 6 s e g 5 s e g 4 l r c k i 8 8 8 7 8 6 8 5 8 9 9 0 1 0 0 9 9 9 8 9 7 9 6 9 5 9 4 9 1 9 2 9 3 1 0 1 1 0 2 1 0 3 1 0 4 1 0 5 1 0 6 1 0 7 1 0 8 1 0 9 1 1 0 1 1 1 1 1 2 2 9 3 0 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 3 3 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 0 5 1 5 2 5 3 5 4 5 5 5 6
? 4 cxp402 pin description symbol i/o description (port a) 4-bit i/o port. i/o can be set in a unit of single bits. pull-up resistor is attached for input. (4 pins) (port b) 4-bit i/o port. i/o can be set in a unit of single bits. pull-up resistor is attached for input. (4 pins) (port c) 4-bit i/o port. i/o can be set in a unit of single bits. pull-up resistor is attached for input. (4 pins) lcd segment signal output. (16 pins) lcd common signal output. lcd bias power supply. bias voltage is generated, which is 1/3 the supply voltage due to the internal resistor. (3 pins) sens input from ssp. track jump count signal input. serial data output to ssp. serial data latch output to ssp. serial clock output to ssp. spindle motor on/off control output. spindle motor servo control. (2 pins) lock signal output. gfs is sampled at 460hz and; when gfs is high, this pin outputs a high signal. if gfs is low eight convective samples, this pin outputs low. wide-band efm pll charge pump output. (2 pins) wide-band efm pll vco2 oscillation input. wide-band efm pll vco2 oscillation output. wide-band efm pll vco2 control voltage input. master pll charge pump output. master pll filter input. master pll filter output. master vco control voltage input. efm signal input. asymmetry circuit constant current input. asymmetry comparator voltage input. efm output. (full swing) system reset input. active at low. i/o i/o i/o output output input input output output output output output (tri-state) output output (tri-state) input output input output (tri-state) input output (analog) input input input input output input pa0 to pa3 pb0 to pb3 pc0 to pc3 seg0 to seg15 com0 to com3 v lc1 to v lc3 sein cnin dato xlto clko mon mdp mds lock vpco1 vpco2 vcki v16m vctl pco fili filo cltv rf bias asyi asyo xrst
cxp402 symbol i/o description reset signal output. active at low. focus ok input. used for sens output and servo auto sequencer. d/a interface lr clock output. (f = fs) lr clock input. d/a interface serial data output. d/a interface serial data input. d/a interface bit clock output. d/a interface bit clock input. gtop output. xplck output. gfs output. rfck output. c2po output. xraof output. mnt3 output. mnt1 output. mnt0 output. 1/4 frequency division output of the oscillation input. (4.2336mhz for 16.3944mhz) digital out output. de-emphasis on/off output. high is output for on; low is output for off. wfck output. subcode sync detection output. outputs a high signal when either subcode sync s0 or s1 is detected. sub p to w serial data output. sbso serial clock input. lch analog output. lch operational amplifier input. lch line output. rch analog output. rch operational amplifier rch line output. remote control receiver circuit input. connect a crystal for system clock oscillation. when the clock is supplied externally, input it to the xtai pin and leave the xtao pin open. no connected. output input output input output input output input output output output output output output output output output output output output output output output input output (analog) input (analog) output output (analog) input (analog) output input input xrsto fok lrck lrcki pcmd pcmdi bck bcki gtop xpck gfs rfck c2po xrof mnt3 mnt1 mnt0 c4m dout emph wfck scor sbso exck aout1 ain1 lout1 aout2 ain2 lout2 rmc xtai xtao nc ? 5
? 6 cxp402 symbol i/o description positive power supply. gnd. positive power supply for analog circuit. gnd for analog circuit. positive power supply for oscillation circuit. gnd for oscillation circuit. test for lsi. connect to gnd for normal operation. input input input input v dd v ss av dd av ss xv dd xv ss test1 test0 dtest ctest notes power supply pins av dd , avss, xv dd , xvss, v dd and vss should process all the pins. pcmd is the msb first, two's complement output. gtop is used to monitor the frame sync protection status. (high: sync protection window open.) xugf is the frame sync obtained from the efm signal, and is negative pulse. it is the signal before sync protection. xplck is the inverse of the efm pll clock. the pll is designed so that the falling edge and the efm signal transition point coincide. the gfs signal goes high when the frame sync and the insertion timing match. rfck is derived from the crystal accuracy, and has a cycle of 136 s (at normal speed). c2po represents the data error status. xraof is generated when the 16k ram exceeds the 4f jitter margin.
? 7 cxp402 d a t a b u s p o r t c d a t a p o r t c i / o d i r e c t i o n r d ( p o r t c ) * p u l l - u p t r a n s i s t o r a p p r o x . 5 0 k w * i p * e m p h i i s n o t s c h m i t t i n p u t . i p i n t e r n a l c i r c u i t s c h m i t t i n p u t port c 8 pins hi-z hi-z when reset pa0 to pa3 pb0 to pb3 4 pins pc0 to pc3 rmc xrst sein cnin vcki fok lrcki pcmdi bcki exck 10 pins hi-z p o r t s a , b d a t a p o r t s a , b i / o d i r e c t i o n r d ( p o r t s a , b ) d a t a b u s * p u l l - u p t r a n s i s t o r a p p r o x . 5 0 k w * i n p u t p r o t e c t i o n c i r c u i t i p input/output circuit formats for pins port a port b pin circuit format
? 8 cxp402 i p * * * i n t e r n a l r e s i s t o r a p p r o x . 2 0 k w x t a i x v s s x v d d x t a o 4 pins 16 pins v dd level v lc1 = 3/4v dd v lc2 = 2/4v dd v lc3 = 1/4v dd (when pins left open) when reset com0 com1 com2 com3 3 pins v lc1 v lc2 v lc3 xv dd xtai xtao xv ss 4 pins oscillation v l c 1 v l c 2 v d d v l c 3 pin circuit format v c h v c l seg0 to seg15 v dd level
? 9 cxp402 pco mdp vpco1 vpco2 4 pins 1 pin m d s o u t p u t e n a b l e mds i p 6 pins when reset vctl fili cltv rf bias asyi 2 pins ain1 ain2 aout1 aout2 lout1 lout2 4 pins i p p o l y r e s i s t o r pin circuit format
? 10 cxp402 when reset dato xlto clko lock mon v16m filo asyo xrsto lrck pcmd bck gtop xpck gfs rfck c2po xrof mnt3 mnt1 mnt0 c4m dout emph wfck scor sbso pin circuit format 27 pins
? 11 cxp402 absolute maximum ratings item supply voltage lcd bias voltage input voltage output voltage high level output current high level total output current low level output current low level total output current operating temperature storage temperature allowable power dissipation v dd v lc1 , v lc2 , v lc3 v in v out i oh i oh i ol i ol topr tstg p d ?.3 to +7.0 * 1 ?.3 to +7.0 * 2 ?.3 to +7.0 * 2 ?.3 to +7.0 * 2 ? ?0 15 100 ?0 to +75 ?0 to +125 600 v v v v ma ma ma ma c c mw output pin (value per pin) total of output pins output pin (value per pin) total of output pins symbol ratings unit remarks * 1 the potential difference between analog power supplies av dd , avss, the oscillation power supplies xv dd , xvss and v dd , vss should be within 0.3v. * 2 v lc1 , v lc2 , v lc3 , v in and v out should not exceed v dd + 0.3v. note) usage exceeding absolute maximum ratings may permanently impair the lsi. normal operation should be conducted under the recommended conditions. exceeding those conditions may adversely affect the reliability of the lsi. recommended operation conditions item supply voltage v dd v lc1 , v lc2 , v lc3 v ih v ihs v il v ils v ia topr lcd bias voltage high level input voltage low level input voltage analog input voltage operating temperature symbol min. 3.4 v ss 0.7v dd 0.8v dd 0 0 0 ?0 5.25 v dd v dd v dd 0.3v dd 0.2v dd v dd +75 v v v v v v v c operation guaranteed range liquid crystal power supply range * 1 hysteresis input * 2 hysteresis input * 2 * 3 max. unit remarks * 1 the optimal value depends on the characteristics of the used lcd element. also, the lcd bias voltage is biased to 1/3 the supply voltage by the resistor of approximately 20k in the lsi. * 2 rme, xrst, exck, fok, sein, cnin, vcki, lrcki, bcki, pcmdi pins * 3 cltv, fili, rf, vctl, ain1, ain2, bais, asyi pins (vss = 0v reference) (vss = 0v reference)
? 12 cxp402 electrical characteristics dc characteristics (topr = ?0 to +75 c, v ss = av ss = xv ss = 0v reference) item high level output voltage v oh pa, pb bcki, c2po, sbso, dato, xlto, clko, pa (v ol only), pb (v ol only), pc, mon, mds, lock, lrck, pcmd, bck, gtop, gfs, rfck, xrof, mnt3 , mnt1, mnt0, dout, wfck, scor, mdp, vpco2, vpco1, pco, v16m, emph, xpck, asyo, c4m, xrsto, lrck, pcmd v dd = 4.75v, i oh = ?.1ma v dd = 4.75v, i oh = ?.0ma v dd = 4.75v, i oh = 0.28ma v dd = 4.75v, i ol = 0.36ma v dd = 4.75v, i ol = 6.0ma v dd = 4.75v, i ol = 9.0ma v dd = 5.25v, v ih = 5.25v v dd = 5.25v, v il = 0.4v 4.25 4.25 4.25 0.2 ?.2 ?.06 10 0.4 0.4 0.6 30 ?0 ?.2 5 20 v v v v v v a a ma a pf v dd = 5.25v v i = 0, 5.25v v dd = 5.0v v lc1 = 3.75v v lc2 = 2.5v v lc3 = 1.25v v dd = 5.25v 16.93mhz self-excited oscillation operation all output pins left open clock 1mhz 0v for no-measured pins xtai pa to pc pcmdi, rme, xrst, exck, fok, sein, cnin, vcki, lrcki, bcki, cltv, fili, rf, vctl, ain1, ain2, mdp, mds, vpco1, vpco2 com0 to com3 seg0 to seg15 v dd , av dd pins other than v lc1 to v lc3 , com0 to com3, seg0 to seg15, pa to pc, v dd , v ss , av dd , av ss , xv dd , xv ss v ol i ih i ile i il i iz low level output voltage input current high-impedance i/o leak current common output impedance 7 3 5 37 30 5 15 80 k k k ma v dd = 5v, v lc1 , v lc2 , v lc3 pins left open v lc1 , v lc2 , v lc3 r b r com r seg i dd c in lcd bias voltage resistance segment output impedance supply current input capacity symbol pins conditions min. typ. max. unit filo
? 13 cxp402 ac characteristics 1. xtai pin (1) when using self-excited oscillation (topr = ?0 to +75 c, v dd = av dd = 5.0v 5%) (2) when inputting pulses to xtai pin (topr = ?0 to +75 c, v dd = av dd = 5.0v 5%) (3) when inputting sine waves to xtai pin via a capacitor (topr = ?0 to +75 c, v dd = av dd = 5.0v 5%) oscillation frequency f max 15 16.93 20 mhz item symbol min. typ. max. unit high level pulse width t whx 13 500 ns low level pulse width t wlx 13 500 ns pulse cycle t ck 26 1,000 ns input high level v ihx v dd ?1.0 v input low level v ilx 0.8 v rise time, fall time t r , t f 10 ns item symbol min. typ. max. unit input amplitude v i 2.0 v dd + 0.3 vp-p item symbol min. typ. max. unit t r t f t w h x t w l x t c k v i l x v i h x 0 . 1 v i h x 0 . 9 v i h x x t a i v d d / 2
? 14 cxp402 2. cnin, exck pins (v dd = av dd = 5.0v 5%, v ss = av ss = 0v, topr = ?0 to +75 c) 3. bcki, lrcki, pcmdi pins (v dd = av dd = 5.0v 5%, v ss = av ss = 0v, topr = ?0 to +75 c) clock frequency clock pulse width setup time hold time delay time latch pulse width exck frequency exck pulse width f ck t wck t su t h t d t wl f t f wt 750 300 300 300 750 750 0.65 0.65 mhz ns ns ns ns ns mhz ns item symbol min. typ. max. unit t w c k t w c k 1 / f c k t h t s u t w l t d 1 / f t t w t t w t t h t s u c l k d a t a x l t e x c k c n i n s u b q bck pulse width datal, r setup time datal, r hold time lrck setup time t w t su t h t su ns ns ns ns item symbol conditions typ. 94 18 18 18 min. max. unit v d d / 2 v d d / 2 t w ( b c k i ) t w ( b c k i ) t s u ( p c m d i ) t h ( p c m d i ) t s u ( l r c k i ) b c k i p c m d i l r c k i
? 15 cxp402 1-bit dac, lpf blocks analog characteristics analog characteristics (v dd = av dd = 5.0v, v ss = av ss = 0v, ta = 25 c) fs = 44.1khz. the total harmonic distortion and signal-to-noise ratio are measured by the circuits shown below. lpf external circuit diagram block diagram of analog characteristics measurement item total harmonic distortion signal-to- noise ratio symbol thd s/n conditions 1khz, 0db data crystal 1khz, 0db data (a-filter) 384fs 768fs 384fs 768fs 96 96 0.0050 0.0045 100 100 0.0070 0.0065 min. typ. max. unit % db a u d i o a n a l y z e r s h i b a s o k u ( a m 5 1 a ) 1 0 0 k 2 2 6 8 0 p 1 2 k 1 2 k 1 2 k 1 5 0 p a o u t 1 ( 2 ) a i n 1 ( 2 ) l o u t 1 ( 2 ) a u d i o a n a l y z e r c x p 4 0 2 r c h a l c h b d a t a r f t e s t d i s c 7 6 8 f s / 3 8 4 f s (v dd = av dd = 5.0v, v ss = av ss = 0v, topr = ?0 to +75 c) output voltage load resistance v out r l * 1 * 1 vrms k item symbol 8 min. max. 1.23 * typ. applicable pins unit * when a sine wave of 1khz, 0db is output. applicable pins * 1 lout1, lout2
? 16 cxp402 s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e w e i g h t e p o x y r e s i n s o l d e r p l a t i n g c o p p e r a l l o y p a c k a g e s t r u c t u r e 0 . 6 5 0 . 3 2 0 . 0 5 1 2 8 2 9 5 6 5 7 8 4 8 5 1 1 2 2 0 . 0 0 . 1 2 2 . 0 0 . 2 1 . 7 m a x 1 . 4 0 . 1 m d e t a i l a d e t a i l b 0 . 3 2 0 . 0 5 ( 0 . 3 ) ( 0 . 1 2 5 ) 0 . 1 4 5 0 . 0 3 ( 2 1 . 0 ) ( 0 . 5 ) 0 1 0 0 . 1 3 a b 0 . 1 1 1 2 p i n l q f p ( p l a s t i c ) l q f p - 1 1 2 p - l 0 1 l q f p 1 1 2 - p - 2 0 2 0 1 . 3 g s s s 0 . 1 0 . 0 5 0 . 6 0 . 1 5 0 . 2 5 package outline unit: mm

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